Reconfigurable integrated circuit devices, such as programmable logic devices (PLDs), are often included in complex embedded systems. A PLD is typically composed of a number of logic elements, sometimes referred to as logic array blocks (LABs) or configurable logic blocks (CLBs), which are sometimes referred to as logic elements. Such logic elements may include a look-up table (LUT) or product term, carry-out chain, register, and other elements. Multiple logic elements or LABs may be connected to horizontal and vertical conductors that may extend the length of the PLD's core logic region and connect to input-output (IO) and peripheral blocks.
With increasing device capacity and complexity, partial reconfiguration has become an important feature in PLDs. Such feature is driven by the need to shorten the configuration time to more quickly bring up a PLD, as well as the need to reconfigure the PLD on the fly to reduce or eliminate system downtime. Generally, a PLD configuration may include core logic configuration and IO configuration. Generally, IO configuration is different from core logic configuration, due to the variance in configuration elements and structures. For example, IO configuration may include a group of serially-connected configuration shift registers (collectively referred to as a configuration shift register chain). However, the configuration shift registers can only be fully configured in a regular full device configuration or reconfiguration (e.g., configured in the same way as the core logic region of the PLD). Reconfiguring any part of the configuration shift registers may thus require the PLD to be powered down (or otherwise deactivated or suspended). As a result, the configuration of the PLD may need to be restarted from the beginning each time, which is laborious and time-consuming.